Study programmeFrançais
Computer Architecture
Programme component of Master's Degree in Computer Engineering and Management Professional Focus - Mastering Information Systems à la Faculty of Engineering
CodeTypeHead of UE Department’s
contact details
Teacher(s)
UI-M1-IRIGSI-004-MCompulsory UEHANCQ JoelF105 - Théorie des circuits et Traitement du signal
  • GOSSELIN Bernard
  • HANCQ Joel
  • VALDERRAMA SAKUYAMA Carlos Alberto

Language
of instruction
Language
of assessment
HT(*) HTPE(*) HTPS(*) HR(*) HD(*) CreditsWeighting Term
  • Français
Français24240004.004.00

AA CodeTeaching Activity (AA) HT(*) HTPE(*) HTPS(*) HR(*) HD(*) Term Weighting
I-TCTS-008Computer Architecture2424000Q1100.00%
Unité d'enseignement

Objectives of Programme's Learning Outcomes

  • Imagine, design, develop, and implement conceptual models and computer solutions to address complex problems including decision-making, optimisation, management and production as part of a business innovation approach by integrating changing needs, contexts and issues (technical, economic, societal, ethical and environmental).
    • On the basis of modelling, design a system or a strategy addressing the problem raised; evaluate them in light of various parameters of the specifications.
  • Mobilise a structured set of scientific knowledge and skills and specialised techniques in order to carry out computer and management engineering missions, using their expertise and adaptability.
    • Analyse and model an innovative IT solution or a business strategy by critically selecting theories and methodological approaches (modelling, optimisation, algorithms, calculations), and taking into account multidisciplinary aspects.
  • Imagine, design, develop, and implement conceptual models and computer solutions to address complex problems including decision-making, optimisation, management and production as part of a business innovation approach by integrating changing needs, contexts and issues (technical, economic, societal, ethical and environmental).
    • On the basis of modelling, design a system or a strategy addressing the problem raised; evaluate them in light of various parameters of the specifications.

Learning Outcomes of UE

Assess any hardware solution taking into account its technical performances.

The course intends to develop a critical analysis of computers systems as well as to put into light the interaction constraints between their different components.

Under a "design" point of view, it brings a technological assessment permitting to elaborate the functional architecture of a computer system oriented towards a given application.

Under a "practical" point of view, the student is confronted with the implementation of solutions based on microprocessors and this, for dedicated applications.



Content of UE

Combinational and synchronous sequential logic;
Information processing: binary representation, manipulation and protection;
Algorithmic state machines;
Basics: processor and machine language, main memory, input-output, bus; CISC/RISC machines, superscalars; multicores
Specific machines: digital signal processors, graphic processors;
Illustration with 8 bit microprocessors (Intel 8051, Zilog Z8 and Microchip PIC16) : programming
in assembly language and C, memory access, interrupts, timers, ADC/DAC, UART, code optimization.

Prior Experience

None

Type of Assessment for UE in Q1

  • Oral examination
  • Written examination
  • Quoted exercices

Q1 UE Assessment Comments

For the « lecture » part:
- Written examination on all the material and without class notes (4 hours),
- Oral examination without class notes (theory and exercises) (possible exemption if at least 12/20 to the graded exercise)(1 hour).

Moreover, during the laboratory sessions, students are evaluated, first on the basis of a questionnaire at the end of the lab session, as well as a final laboratory examination (4h) consisting by a questionnaire and a practical application program in assembly language (Intel) or C (PIC).

Weighting : the two parts have equal weight in the final mark.

Type of Assessment for UE in Q2

  • N/A

Q2 UE Assessment Comments

Not applicable

Type of Assessment for UE in Q3

  • Oral examination
  • Quoted exercices

Q3 UE Assessment Comments

For the "lecture part", oral examination and for "laboratory sessions", quoted exercice.

Possible carry over of the mark of each part if greater than 12/20.

Q1 UE Resit Assessment Comments (BAB1)

Not applicable

Type of Teaching Activity/Activities

AAType of Teaching Activity/Activities
I-TCTS-008
  • Cours magistraux
  • Travaux pratiques
  • Etudes de cas

Mode of delivery

AAMode of delivery
I-TCTS-008
  • Face to face

Required Reading

AARequired Reading
I-TCTS-008Note de cours - Partie 1 - STRUCTURE DES ORDINATEURS - Tome 1 - Systèmes logiques - J. HANCQ
Note de cours - Partie 2 - STRUCTURE DES ORDINATEURS - Tome 2 - Architectures - J. HANCQ

Required Learning Resources/Tools

AARequired Learning Resources/Tools
I-TCTS-008Copies of presentations
Laboratory protocols

Recommended Reading

AARecommended Reading
I-TCTS-008

Recommended Learning Resources/Tools

AARecommended Learning Resources/Tools
I-TCTS-008Not applicable

Other Recommended Reading

AAOther Recommended Reading
I-TCTS-008.L. HENNESSY, D. PATTERSON, 2001, Architectures des ordinateurs (2eme édition), Vuilert
A. TANENBAUM, 2001, Arcitecture de l'ordinateur (4eme édition), Dunod
W. STALLINGS, 2003, Organisation et architecture de l'ordinateur (6eme édition), Pearson Education
P. ZANELLA, Y. LIGIER, 2005, Architecture et technologies des ordinateurs (4eme édition), Dunod
A. CAZES, J. DELACROIX, 2011, Architecture des machines et des systèmes informatiques, Dunod

Grade Deferrals of AAs from one year to the next

AAGrade Deferrals of AAs from one year to the next
I-TCTS-008Autorisé
Date de génération : 17/03/2017
20, place du Parc, B7000 Mons - Belgique
Tél: +32 (0)65 373111
Courriel: info.mons@umons.ac.be