Study programme | Français | ||
Computer Architecture | |||
Programme component of Master's Degree in Computer Engineering and Management Professional Focus - Mastering Information Systems à la Faculty of Engineering |
Code | Type | Head of UE | Department’s contact details | Teacher(s) |
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UI-M1-IRIGSI-004-M | Compulsory UE | HANCQ Joel | F105 - Théorie des circuits et Traitement du signal |
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Language of instruction | Language of assessment | HT(*) | HTPE(*) | HTPS(*) | HR(*) | HD(*) | Credits | Weighting | Term |
---|---|---|---|---|---|---|---|---|---|
| Français | 24 | 24 | 0 | 0 | 0 | 4.00 | 4.00 |
AA Code | Teaching Activity (AA) | HT(*) | HTPE(*) | HTPS(*) | HR(*) | HD(*) | Term | Weighting |
---|---|---|---|---|---|---|---|---|
I-TCTS-008 | Computer Architecture | 24 | 24 | 0 | 0 | 0 | Q1 | 100.00% |
Unité d'enseignement |
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Objectives of Programme's Learning Outcomes
Learning Outcomes of UE
Assess any hardware solution taking into account its technical performances.
The course intends to develop a critical analysis of computers systems as well as to put into light the interaction constraints between their different components.
Under a "design" point of view, it brings a technological assessment permitting to elaborate the functional architecture of a computer system oriented towards a given application.
Under a "practical" point of view, the student is confronted with the implementation of solutions based on microprocessors and this, for dedicated applications.
Content of UE
Combinational and synchronous sequential logic;
Information processing: binary representation, manipulation and protection;
Algorithmic state machines;
Basics: processor and machine language, main memory, input-output, bus; CISC/RISC machines, superscalars; multicores
Specific machines: digital signal processors, graphic processors;
Illustration with 8 bit microprocessors (Intel 8051, Zilog Z8 and Microchip PIC16) : programming
in assembly language and C, memory access, interrupts, timers, ADC/DAC, UART, code optimization.
Prior Experience
None
Type of Assessment for UE in Q1
Q1 UE Assessment Comments
For the « lecture » part:
- Written examination on all the material and without class notes (4 hours),
- Oral examination without class notes (theory and exercises) (possible exemption if at least 12/20 to the graded exercise)(1 hour).
Moreover, during the laboratory sessions, students are evaluated, first on the basis of a questionnaire at the end of the lab session, as well as a final laboratory examination (4h) consisting by a questionnaire and a practical application program in assembly language (Intel) or C (PIC).
Weighting : the two parts have equal weight in the final mark.
Type of Assessment for UE in Q2
Q2 UE Assessment Comments
Not applicable
Type of Assessment for UE in Q3
Q3 UE Assessment Comments
For the "lecture part", oral examination and for "laboratory sessions", quoted exercice.
Possible carry over of the mark of each part if greater than 12/20.
Q1 UE Resit Assessment Comments (BAB1)
Not applicable
Type of Teaching Activity/Activities
AA | Type of Teaching Activity/Activities |
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I-TCTS-008 |
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Mode of delivery
AA | Mode of delivery |
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I-TCTS-008 |
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Required Reading
AA | Required Reading |
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I-TCTS-008 | Note de cours - Partie 1 - STRUCTURE DES ORDINATEURS - Tome 1 - Systèmes logiques - J. HANCQ Note de cours - Partie 2 - STRUCTURE DES ORDINATEURS - Tome 2 - Architectures - J. HANCQ |
Required Learning Resources/Tools
AA | Required Learning Resources/Tools |
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I-TCTS-008 | Copies of presentations Laboratory protocols |
Recommended Reading
AA | Recommended Reading |
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I-TCTS-008 |
Recommended Learning Resources/Tools
AA | Recommended Learning Resources/Tools |
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I-TCTS-008 | Not applicable |
Other Recommended Reading
AA | Other Recommended Reading |
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I-TCTS-008 | .L. HENNESSY, D. PATTERSON, 2001, Architectures des ordinateurs (2eme édition), Vuilert A. TANENBAUM, 2001, Arcitecture de l'ordinateur (4eme édition), Dunod W. STALLINGS, 2003, Organisation et architecture de l'ordinateur (6eme édition), Pearson Education P. ZANELLA, Y. LIGIER, 2005, Architecture et technologies des ordinateurs (4eme édition), Dunod A. CAZES, J. DELACROIX, 2011, Architecture des machines et des systèmes informatiques, Dunod |
Grade Deferrals of AAs from one year to the next
AA | Grade Deferrals of AAs from one year to the next |
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I-TCTS-008 | Autorisé |