Study programme 2018-2019 | Français | ||
Analog Electronics | |||
Programme component of Master's Degree in Electrical Engineering à la Faculty of Engineering |
Code | Type | Head of UE | Department’s contact details | Teacher(s) |
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UI-M1-IRELEC-005-M | Compulsory UE | DUALIBE Fortunato | F109 - Electronique et Microélectronique |
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Language of instruction | Language of assessment | HT(*) | HTPE(*) | HTPS(*) | HR(*) | HD(*) | Credits | Weighting | Term |
---|---|---|---|---|---|---|---|---|---|
| Anglais | 30 | 30 | 0 | 0 | 0 | 5 | 5.00 | 1st term |
AA Code | Teaching Activity (AA) | HT(*) | HTPE(*) | HTPS(*) | HR(*) | HD(*) | Term | Weighting |
---|---|---|---|---|---|---|---|---|
I-SEMI-004 | Analog Electronics | 30 | 30 | 0 | 0 | 0 | Q1 | 100.00% |
Programme component | ||
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UI-M1-IRELEC-002-M Signal Processing |
Objectives of Programme's Learning Outcomes
Learning Outcomes of UE
Students should be able: to understand the advanced models of MOS and bipolar transistors, to understand and design the basic analog blocks: differential amplifiers, output stages in CMOS and bipolar technology, voltage and current references. To assembly basic analog blocks for designing several types of multi-stage amplifiers such as operational amplifiers, to understand the imperfections of operational amplifiers and their impacts in the application circuits, to analyze feedback amplifiers, to analyze the stability and frequency response of amplifiers, to design more complex analog architectures such as switched capacitor filters and DCDC switched converters. To learn how to design analog circuits from the specifications by means of the gm/ID methodology, to acquire notions of analog microelectronics.
Content of UE
<b>Theory-Exercices mode course. Students must be present during the first lecture. Contents: </b>multistage amplifiers with MOS and bipolar transistors; study of some typical circuits with several transistors; frequency response of the amplifiers; noise on electronics devices and their impacts in the amplifier, mismatch, output stages; internal circuits of operational amplifiers; feedback amplifiers : PP, SS, PS, SP, stability and compensation of operational amplifiers; synthesis of operational amplifiers; notions of analog microelectronics, examples of more complex analogue systems: switched capacitor filters, DCDC switched converters, ADC and DAC converters.
Prior Experience
-I-SEMI-020: Dispositifs et technologies électroniques (BA3) - I-SEMI-001: Electronique fonctionelle (BA3)
Type of Assessment for UE in Q1
Q1 UE Assessment Comments
<b>-</b>Practical works quiz, one per lab work (maximum 8 groups composed by 3 students each ) plus final lab examination, personal (3 hours), <b>during session</b> : 15% -Exam of exercises (open book, 3 hours examination), <b>before sesion</b> : 42,5% -Oral examination plus research work presentation (open book), <b>during session</b> : 42,5% <b>NOTE:</b> <b>During the session examination, students will have to be available all day to present the oral exam and the final exam of practical lab works, with a maximum of 12 students per day. The SEMi electronics laboratory will have to be available. In order to avoid any kind of speculation, all points will be revealed after the final oral examination during session</b>
Type of Assessment for UE in Q3
Q3 UE Assessment Comments
Exercises examination (open book, 2 hours). Weight: 50%.Oral examination (open book, 45 minutes). Weight: 50%.
Type of Resit Assessment for UE in Q1 (BAB1)
Q1 UE Resit Assessment Comments (BAB1)
Not applicable
Type of Teaching Activity/Activities
AA | Type of Teaching Activity/Activities |
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I-SEMI-004 |
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Mode of delivery
AA | Mode of delivery |
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I-SEMI-004 |
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Required Reading
AA | Required Reading |
---|---|
I-SEMI-004 | Note de cours - Complément - Analog_electronics_Sylabus - C. Valderrama Notes d'exercices - Analog_Electronics_Exercises - F. Dualibe |
Required Learning Resources/Tools
AA | Required Learning Resources/Tools |
---|---|
I-SEMI-004 | -Design of Analog CMOS Integrated Circuits By B. Razavi ISBN: 0072380322, McGraw-Hill Science, 2000 |
Recommended Reading
AA | Recommended Reading |
---|---|
I-SEMI-004 |
Recommended Learning Resources/Tools
AA | Recommended Learning Resources/Tools |
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I-SEMI-004 | Not applicable |
Other Recommended Reading
AA | Other Recommended Reading |
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I-SEMI-004 | -Modern VLSI Design; System on Chip, 3rd Edition By W. Wolf ISBN: 0130619701, Prentice Hall, 2002. |
Grade Deferrals of AAs from one year to the next
AA | Grade Deferrals of AAs from one year to the next |
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I-SEMI-004 | Authorized |