 | Study programme 2018-2019 | Français | |
 | Computer Architecture | ||
Activité d'apprentissage à la Faculty of Science |
| Code | Lecturer(s) | Associate Lecturer(s) | Subsitute Lecturer(s) et other(s) |
|---|---|---|---|
| S-INFO-600 |
|
| Language of instruction | Language of assessment | HT(*) | HTPE(*) | HTPS(*) | HR(*) | HD(*) | Term |
|---|---|---|---|---|---|---|---|
| Français | Français | 30 | 15 | 0 | 0 | 0 | Q2 |
Content of Learning Activity
binary, octal and hexadecimal representations ;
two's complement ; floating point representation ;
arithmetic and logic unit (ALU) ;
logic gates ; latches and flip-flops ;
instruction set ; machine language ; compilation ; library ;
register ; SRAM ; DRAM ; cache memory ;
processor ; RISC versus CISC ;
interrupt ; DMA ; system call
Required Learning Resources/Tools
Computer Organization and Design, 4th Edition D. Patterson and J. Hennessy, 2008, Morgan-Kaufmann
Recommended Learning Resources/Tools
Not applicable
Other Recommended Reading
- A Practical Introduction to Computer Architecture, D. Page, 2009, Springer-Verlag.
- Digital Design: Principles and Practice, 3rd Edition, J. Wakerly, 2001, Prentice Hall.
- Code: The Hidden Language of Computer Hardware and Software, C. Petzold, 1999, Microsoft Press.
- Computer Organization and Architecture, 8th Edition, W. Stallings, 2008, Prentice Hall.
- Computers as Components, 2nd Edition, W. Wolf, 2003, Morgan-Kaufmann.
Mode of delivery
- Face to face
Type of Teaching Activity/Activities
- Cours magistraux
- Travaux pratiques
Evaluations
The assessment methods of the Learning Activity (AA) are specified in the course description of the corresponding Educational Component (UE)