Study programme 2017-2018 | Français | ||
Logic Systems for Computer Science and Automation | |||
Programme component of Master's Degree in Computer Engineering and Management à la Faculty of Engineering |
Code | Type | Head of UE | Department’s contact details | Teacher(s) |
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UI-M1-IRIGIG-705-M | Optional UE | HANCQ Joel | F105 - Théorie des circuits et Traitement du signal |
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Language of instruction | Language of assessment | HT(*) | HTPE(*) | HTPS(*) | HR(*) | HD(*) | Credits | Weighting | Term |
---|---|---|---|---|---|---|---|---|---|
| Français | 18 | 30 | 0 | 0 | 0 | 4 | 4 | 1st term |
AA Code | Teaching Activity (AA) | HT(*) | HTPE(*) | HTPS(*) | HR(*) | HD(*) | Term | Weighting |
---|---|---|---|---|---|---|---|---|
I-TCTS-020 | Logic for Automation | 12 | 18 | 0 | 0 | 0 | Q1 | 75.00% |
I-TCTS-021 | Logic for Computer Science | 6 | 12 | 0 | 0 | 0 | Q1 | 25.00% |
Programme component |
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Objectives of Programme's Learning Outcomes
Learning Outcomes of UE
Study any logic system and present a critical analysis of it (first part: knowledge of basic components and their association);
Use the presented approaches like guides and implement them : in the industrial automation and computer science, to find a solution to a given problem : specification of a hardware with current software tools (VHDL compilers).
Content of UE
Generalities including Boolean algebra, simplification methods,
Logic components,
Analysis and synthesis (combinational and sequential),
The Grafcet.
Binary information representation and protection,
Introduction to VHDL language.
Prior Experience
Not applicable
Type of Assessment for UE in Q1
Q1 UE Assessment Comments
Graded exercise on all the material of the first part with class notes and laboratory notes (3 hours),
Oral examination without class notes or laboratory notes (theory and exercises) (possible exemption if at least 14/20 to the graded exercise)(1 hour).
Type of Assessment for UE in Q3
Q3 UE Assessment Comments
Oral examination without class notes or laboratory notes (theory and exercises)
Q1 UE Resit Assessment Comments (BAB1)
Not applicable
Type of Teaching Activity/Activities
AA | Type of Teaching Activity/Activities |
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I-TCTS-020 |
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I-TCTS-021 |
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Mode of delivery
AA | Mode of delivery |
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I-TCTS-020 |
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I-TCTS-021 |
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Required Reading
AA | Required Reading |
---|---|
I-TCTS-020 | Note de cours - SYSTEMES LOGIQUES - Tome 1 - Bases théoriques : Analyse et synthèse - B. GOSSELIN et J.HANCQ |
I-TCTS-021 | Note de cours - SYSTEMES LOGIQUES - Tome 2 - Modèles avancés - B. GOSSELIN et J. HANCQ |
Required Learning Resources/Tools
AA | Required Learning Resources/Tools |
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I-TCTS-020 | Copies of presentations Laboratory protocols |
I-TCTS-021 | Copies of presentations Laboratory protocols |
Recommended Reading
AA | Recommended Reading |
---|---|
I-TCTS-020 | Travaux Pratiques - SYSTEMES LOGIQUES - Tome 3 - Travaux pratiques - B. GOSSELIN et J.HANCQ |
I-TCTS-021 | Travaux Pratiques - SYSTEMES LOGIQUES - Tome 3 - Travaux pratiques - B. GOSSELIN et J. HANCQ |
Recommended Learning Resources/Tools
AA | Recommended Learning Resources/Tools |
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I-TCTS-020 | Not applicable |
I-TCTS-021 | Software for PC : VHDL compiler |
Other Recommended Reading
AA | Other Recommended Reading |
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I-TCTS-020 | Traité d'Electricité - Vol. V - Analyse et synthèse des systèmes logiques, D. MANGE, Presses Polytechniques Romandes, 1979. Design of Logic Systems, Second edition, D. LEWIN, D. PROTHEROE, Chaman & Hall, 1992 7 FACETTES DU GRAFCET, D. GENDREAU (Collectif coordonné par ), Cepadués, 2000 |
I-TCTS-021 | Circuits numériques et synthèse logique, un outil : VHDL, J. WEBER, M. MEAUDRE, Masson, 1995 |
Grade Deferrals of AAs from one year to the next
AA | Grade Deferrals of AAs from one year to the next |
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I-TCTS-020 | Authorized |
I-TCTS-021 | Authorized |