Study programme | Français | ||
Hardware/Software Platforms | |||
Programme component of Master's Degree in Electrical Engineering à la Faculty of Engineering |
Code | Type | Head of UE | Department’s contact details | Teacher(s) |
---|---|---|---|---|
UI-M1-IRELEC-006-M | Compulsory UE | VALDERRAMA SAKUYAMA Carlos Alberto | F109 - Electronique et Microélectronique |
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Language of instruction | Language of assessment | HT(*) | HTPE(*) | HTPS(*) | HR(*) | HD(*) | Credits | Weighting | Term |
---|---|---|---|---|---|---|---|---|---|
| Anglais | 8 | 16 | 0 | 0 | 0 | 2.00 | 2.00 |
AA Code | Teaching Activity (AA) | HT(*) | HTPE(*) | HTPS(*) | HR(*) | HD(*) | Term | Weighting |
---|---|---|---|---|---|---|---|---|
I-SEMI-125 | Hardware/Software Platforms | 8 | 16 | 0 | 0 | 0 | Q2 | 100.00% |
Unité d'enseignement | ||
---|---|---|
UI-M1-IRELEC-004-M Digital Electronics |
Objectives of Programme's Learning Outcomes
Learning Outcomes of UE
At the end of this course, students will be able to: Adopt an applied scientific approach - Innovate - Implement solutions - Plan and carry out projects in engineering - Work in and lead a team - Master scientific and technical communication - Be a critical, reflexive and independent professional. Design a practical application (for the fields of automation, robotics, human-computer interface, ...), a complete system (from the choice of components defining the hardware and software developed platform), or library components (operators or drivers), using existing off-the-shelf components (COTS, sensors/actuators, communication), programmable (microprocessors) and reconfigurable architectures (FPGA), operating systems (Linux and Android), while using varied communication mechanisms, advanced programming mechanisms and techniques, design tools and development platforms to produce an innovative implementation result. Put into practice the acquired knowledge in the use of microprocessors and reconfigurable architectures, languages (C / C ++, Java, Python, VHDL), programming techniques (threads, interrupts, timers, counters), interfacing techniques and communications protocols (I2C, CAN, RS232, ZigBee, Bluetooth, WIFI, ..). To practice development methodologies, validation and project management techniques. Aspects of management, tasks’ organization, state of the art analysis and integration of the various parts of sub-projects and projects (portfolio). (Organization of tasks, the study stresses and the creation of mechanisms of testing and validation). Master the configuration and interfacing of existing component (communication, protocols, data exchange, datasheet and technical data understanding). Assess the technical constraints and propose innovative solutions (communicate, justify, compare, demonstrate, validate, analysis of results). Support a draft, present the results and demonstrate the contributions in oral form as well as on a technical report (state of the art, technical, specifications, methods, equipment to use, organization of tasks, and the creation tests of validation mechanisms and analysis of results,…).
Content of UE
Software / hardware architectures. Electronic management of electrical and physical events. Off-the-shelf COTS Electronic devices, wired and wireless communication (WiFi, Bluetooth, Zigbee, NFC, Addoc). Digital integrated sensors (accelerometer, gyroscope, GPS, Magnetometer, Light, Temperature, ultrasound, infrared, ...), mechanical/electronic actuators (servo, motor DC, Triac/Thyristor, LED, ...), Electronic and Human-Machine Interfaces (I2C, UART, touch screen, display, ...), hardware and software platforms (microprocessor, FPGA, Raspberry-Pi, Linux, Android), embedded coding paradigms, specification methodology, verification and validation. Project management (market research, spots, checkpoints, results).
Prior Experience
Electronics, Microprocessors, Programming languages.
Type of Assessment for UE in Q1
Q1 UE Assessment Comments
Not applicable
Type of Assessment for UE in Q2
Q2 UE Assessment Comments
AA evaluation. AA I-SEMI-125 Hardware-software Platforms (14418). Total 1st session (2nd quarter - June): 100%. Individual (60%) and group (40%) development. A subject of study among the list of the course content is proposed as a previously established work framework. Technical realization, report (2/3), and presentation (1/3).
Type of Assessment for UE in Q3
Q3 UE Assessment Comments
AA evaluation. AA I-SEMI-025 Projets de systèmes à microprocesseurs (5014). Total 2nd session 100%: Individual Development (100%). Report and technical realization (2/3) and presentation (1/3).
Type of Resit Assessment for UE in Q1 (BAB1)
Q1 UE Resit Assessment Comments (BAB1)
Not applicable
Type of Teaching Activity/Activities
AA | Type of Teaching Activity/Activities |
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I-SEMI-125 |
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Mode of delivery
AA | Mode of delivery |
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I-SEMI-125 |
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Required Reading
AA | |
---|---|
I-SEMI-125 |
Required Learning Resources/Tools
AA | Required Learning Resources/Tools |
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I-SEMI-125 | Technical documentation, datasheets, user manual, and specifications. Electrical interconnection of electronic components (schemes). Previous years' achievements (technical reports, source code, video). |
Recommended Reading
AA | |
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I-SEMI-125 |
Recommended Learning Resources/Tools
AA | Recommended Learning Resources/Tools |
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I-SEMI-125 | Web site Simius http://www.semi.fpms.ac.be. Website forum Raspberry-Pi (https://www.raspberrypi.org/). Website forum Python (https://www.python.org/). Android training tutorials, embedded Linux, Altera / Xilinx. Simius community https://plus.google.com/u/0/communities/108470736534034152838. Android Community: https://plus.google.com/u/1/communities/116831166570075716167. |
Other Recommended Reading
AA | Other Recommended Reading |
---|---|
I-SEMI-125 | Not applicable |
Grade Deferrals of AAs from one year to the next
AA | Grade Deferrals of AAs from one year to the next |
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I-SEMI-125 | Autorisé |