Study programmeFrançais
Logic Systems
Programme component of Bachelor's Degree in Engineering à la Faculty of Engineering
CodeTypeHead of UE Department’s
contact details
Teacher(s)
UI-B3-IRCIVI-202-MCompulsory UEHANCQ JoelF105 - Théorie des circuits et Traitement du signal
  • GOSSELIN Bernard
  • HANCQ Joel

Language
of instruction
Language
of assessment
HT(*) HTPE(*) HTPS(*) HR(*) HD(*) CreditsWeighting Term
  • Français
Français30420006.006.00

AA CodeTeaching Activity (AA) HT(*) HTPE(*) HTPS(*) HR(*) HD(*) Term Weighting
I-TCTS-020Logic for Automation1218000Q150.00%
I-TCTS-021Logic for Computer Science612000Q117.00%
I-TCTS-022Logic Systems - Advanced Models1212000Q133.00%
Unité d'enseignement
Prérequis

Objectives of Programme's Learning Outcomes

  • Implement an engineering approach dealing with a set problem taking into account technical, economic and environmental constraints
    • Understand the stages of an engineering approach
    • Identify and describe the problem to be solved and the functional need (of prospective clients) to be met considering the state of technology
    • Design, evaluate and optimise solutions addressing the problem
    • Implement a chosen solution in the form of a drawing, a schema, a plan, a model, a prototype, software and/or digital model
  • Understand the theoretical and methodological fundamentals in science and engineering to solve problems involving these disciplines
    • Identify, describe and explain the basic principles of engineering particularly in their specialising field
    • Select and rigorously apply knowledge, tools and methods in sciences and engineering to solve problems involving these disciplines
  • Collaborate, work in a team
    • Interact effectively with other students to carry out collaborative projects.

Learning Outcomes of UE

Study any logic system and present a critical analysis of it (first part: knowledge of basic components and their association);

Use the presented approaches like guides and implement them in a project who shows his ability to find a solution to a given problem (second part: for different application areas, specification of a hardware with current software tools (VHDL compilers).

Content of UE

Generalities including Boolean algebra, simplification methods,
Logic components,
Analysis and synthesis (combinational and sequential),
The Grafcet;
Methods for specific application areas (Petri Nets, statecharts, algorithmic state machines,
Binary information processing and protection,
Introduction to VHDL language.

Prior Experience

Not applicable

Type of Assessment for UE in Q1

  • Presentation and works
  • Oral examination
  • Quoted exercices

Q1 UE Assessment Comments

First part ( included Grafcet):
-  a graded exercise on all the material of the first part with class notes and laboratory notes (3 hours),
- an oral examination without class notes or laboratory notes (theory and exercises) (possible exemption if at least 14/20 to the graded exercise)(1 hour).

Second part :
- a project (development of an application on a field-programmable component) (3 laboratory sessions),
- an examination without class notes or laboratory notes (theory and exercises) (3 hours).

Type of Assessment for UE in Q2

  • N/A

Q2 UE Assessment Comments

Not applicable

Type of Assessment for UE in Q3

  • Oral examination

Q3 UE Assessment Comments

Evaluation on all the material with an examination without class notes or laboratory notes (theory, exercises and project) (2 hours)

Q1 UE Resit Assessment Comments (BAB1)

Not applicable

Type of Teaching Activity/Activities

AAType of Teaching Activity/Activities
I-TCTS-020
  • Cours magistraux
  • Exercices dirigés
  • Utilisation de logiciels
  • Travaux pratiques
  • Projet sur ordinateur
I-TCTS-021
  • Cours magistraux
  • Travaux pratiques
I-TCTS-022
  • Cours magistraux
  • Travaux pratiques
  • Projet sur ordinateur

Mode of delivery

AAMode of delivery
I-TCTS-020
  • Face to face
I-TCTS-021
  • Face to face
I-TCTS-022
  • Face to face

Required Reading

AARequired Reading
I-TCTS-020Note de cours - SYSTEMES LOGIQUES - Tome 1 - Bases théoriques : Analyse et synthèse - B. GOSSELIN et J.HANCQ
I-TCTS-021Note de cours - SYSTEMES LOGIQUES - Tome 2 - Modèles avancés - B. GOSSELIN et J. HANCQ
I-TCTS-022Note de cours - SYSTEMES LOGIQUES - Tome 2 - Modèles avancés - B. GOSSELIN et J. HANCQ

Required Learning Resources/Tools

AARequired Learning Resources/Tools
I-TCTS-020Copies of presentations
Laboratory protocols


I-TCTS-021Copies of presentations
Laboratory protocols
I-TCTS-022Copies of presentations
Laboratory protocols
Tools for project on PC

Recommended Reading

AARecommended Reading
I-TCTS-020Travaux Pratiques - SYSTEMES LOGIQUES - Tome 3 - Travaux pratiques - B. GOSSELIN et J.HANCQ
I-TCTS-021Travaux Pratiques - SYSTEMES LOGIQUES - Tome 3 - Travaux pratiques - B. GOSSELIN et J. HANCQ
I-TCTS-022Travaux Pratiques - SYSTEMES LOGIQUES - Tome 3 - Travaux pratiques - B. GOSSELIN et J. HANCQ

Recommended Learning Resources/Tools

AARecommended Learning Resources/Tools
I-TCTS-020Not applicable
I-TCTS-021Software for PC : VHDL compiler
I-TCTS-022Not applicable

Other Recommended Reading

AAOther Recommended Reading
I-TCTS-020Traité d'Electricité - Vol. V - Analyse et synthèse des systèmes logiques, D. MANGE, Presses Polytechniques Romandes, 1979.
Design of Logic Systems, Second edition, D. LEWIN, D. PROTHEROE, Chaman & Hall, 1992
7 FACETTES DU GRAFCET, D. GENDREAU (Collectif coordonné par ), Cepadués, 2000
I-TCTS-021Circuits numériques et synthèse logique, un outil : VHDL, J. WEBER, M. MEAUDRE, Masson, 1995
I-TCTS-022Not applicable

Grade Deferrals of AAs from one year to the next

AAGrade Deferrals of AAs from one year to the next
I-TCTS-020Non autorisé
I-TCTS-021Non autorisé
I-TCTS-022Non autorisé
Date de génération : 17/03/2017
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